#include <stdbool.h>
#include <stdint.h>
#include "i2c.h"

//*****************************************************************************
//
// I2C_initController
//
//*****************************************************************************
void I2C_initController(uint32_t base, uint32_t sysclkHz, uint32_t bitRate, I2C_DutyCycle dutyCycle)
{
    uint32_t modPrescale;
    uint32_t divider;
    uint32_t dValue;
    uint32_t i2cRunClk;

    //
    // Check the arguments. limit: bitRate <= 400K
    //
    ASSERT(I2C_isBaseValid(base));
    ASSERT((10000000U / bitRate) > 25U);

    if ((dutyCycle == I2C_DUTYCYCLE_33) && (bitRate == 400000))
    {
        i2cRunClk = 20000000U;
    }
    else
    {
        i2cRunClk = 10000000U;
    }

    //
    // Set the prescaler for the module clock.
    //
    modPrescale              = (sysclkHz / i2cRunClk) - 1U;
    HWREGH(base + I2C_O_PSC) = I2C_PSC_IPSC_M & modPrescale;

    // compensation i2c Hclk, Lclk cycle
    switch (modPrescale)
    {
        case 0U:
            dValue = 7U;
            break;

        case 1U:
            dValue = 6U;
            break;

        default:
            dValue = 5U;
            break;
    }

    //
    // Set the divider for the time low
    //
    divider = (i2cRunClk / bitRate) - (2U * dValue);
    divider = divider - 9U;

    if ((dutyCycle == I2C_DUTYCYCLE_33) && (bitRate == 400000))
    {
        HWREGH(base + I2C_O_CLKH) = (divider - 7) / 8;
        HWREGH(base + I2C_O_CLKL) = divider - HWREGH(base + I2C_O_CLKH) - 4;
    }
    else
    {
        if (dutyCycle == I2C_DUTYCYCLE_50)
        {
            HWREGH(base + I2C_O_CLKH) = (divider - 7) / 2;
            HWREGH(base + I2C_O_CLKL) = HWREGH(base + I2C_O_CLKH) + 7;
        }
        else
        {
            HWREGH(base + I2C_O_CLKH) = (divider - 7) / 3;
            HWREGH(base + I2C_O_CLKL) = (HWREGH(base + I2C_O_CLKH) + 7) * 2;
        }
    }
}

//*****************************************************************************
//
// I2C_initControllerModuleFrequency
//
//*****************************************************************************
void I2C_initControllerModuleFrequency(uint32_t base, uint32_t sysclkHz, uint32_t bitRate,
    I2C_DutyCycle dutyCycle, uint32_t moduleFrequency)
{
    uint32_t modPrescale;
    uint32_t divider;
    uint32_t dValue;

    //
    // Check the arguments.
    //
    ASSERT(I2C_isBaseValid(base));
    ASSERT((moduleFrequency / bitRate) > 10U);

    //
    // Set the prescaler for the module clock.
    //
    modPrescale              = (sysclkHz / moduleFrequency) - 1U;
    HWREGH(base + I2C_O_PSC) = I2C_PSC_IPSC_M & modPrescale;

    switch (modPrescale)
    {
        case 0U:
            dValue = 7U;
            break;

        case 1U:
            dValue = 6U;
            break;

        default:
            dValue = 5U;
            break;
    }

    //
    // Set the divider for the time low
    //
    divider = (moduleFrequency / bitRate) - (2U * dValue);

    if (dutyCycle == I2C_DUTYCYCLE_50)
    {
        HWREGH(base + I2C_O_CLKH) = divider / 2U;
    }
    else
    {
        HWREGH(base + I2C_O_CLKH) = divider / 3U;
    }

    HWREGH(base + I2C_O_CLKL) = divider - HWREGH(base + I2C_O_CLKH);
}

//*****************************************************************************
//
// I2C_enableInterrupt
//
//*****************************************************************************
void I2C_enableInterrupt(uint32_t base, uint32_t intFlags)
{
    //
    // Check the arguments.
    //
    ASSERT(I2C_isBaseValid(base));

    //
    // Enable the desired basic interrupts
    //
    HWREGH(base + I2C_O_IER) |= (intFlags & 0xFFFFU);

    //
    // Enabling addressed-as-target interrupt separately because its bit is
    // different between the IER and STR registers.
    //
    if ((intFlags & I2C_INT_ADDR_TARGET) != 0U)
    {
        HWREGH(base + I2C_O_IER) |= I2C_IER_AAT;
    }

    //
    // Enable desired FIFO interrupts.
    //
    if ((intFlags & I2C_INT_TXFF) != 0U)
    {
        HWREGH(base + I2C_O_FFTX) |= I2C_FFTX_TXFFIENA;
    }

    if ((intFlags & I2C_INT_RXFF) != 0U)
    {
        HWREGH(base + I2C_O_FFRX) |= I2C_FFRX_RXFFIENA;
    }
}

//*****************************************************************************
//
// I2C_disableInterrupt
//
//*****************************************************************************
void I2C_disableInterrupt(uint32_t base, uint32_t intFlags)
{
    //
    // Check the arguments.
    //
    ASSERT(I2C_isBaseValid(base));

    //
    // Disable the desired basic interrupts.
    //
    HWREGH(base + I2C_O_IER) &= ~(intFlags & 0xFFFFU);

    //
    // Disabling addressed-as-target interrupt separately because its bit is
    // different between the IER and STR registers.
    //
    if ((intFlags & I2C_INT_ADDR_TARGET) != 0U)
    {
        HWREGH(base + I2C_O_IER) &= ~I2C_IER_AAT;
    }

    //
    // Disable the desired FIFO interrupts.
    //
    if ((intFlags & I2C_INT_TXFF) != 0U)
    {
        HWREGH(base + I2C_O_FFTX) &= ~(I2C_FFTX_TXFFIENA);
    }

    if ((intFlags & I2C_INT_RXFF) != 0U)
    {
        HWREGH(base + I2C_O_FFRX) &= ~(I2C_FFRX_RXFFIENA);
    }
}

//*****************************************************************************
//
// I2C_getInterruptStatus
//
//*****************************************************************************
uint32_t I2C_getInterruptStatus(uint32_t base)
{
    uint32_t temp;

    //
    // Check the arguments.
    //
    ASSERT(I2C_isBaseValid(base));

    //
    // Return only the status bits associated with interrupts.
    //
    temp = (uint32_t)(HWREGH(base + I2C_O_STR) & I2C_STR_INTMASK);

    //
    // Read FIFO interrupt flags.
    //
    if ((HWREGH(base + I2C_O_FFTX) & I2C_FFTX_TXFFINT) != 0U)
    {
        temp |= I2C_INT_TXFF;
    }

    if ((HWREGH(base + I2C_O_FFRX) & I2C_FFRX_RXFFINT) != 0U)
    {
        temp |= I2C_INT_RXFF;
    }

    return (temp);
}

//*****************************************************************************
//
// I2C_clearInterruptStatus
//
//*****************************************************************************
void I2C_clearInterruptStatus(uint32_t base, uint32_t intFlags)
{
    //
    // Check the arguments.
    //
    ASSERT(I2C_isBaseValid(base));

    //
    // Clear the interrupt flags that are located in STR.
    //
    HWREGH(base + I2C_O_STR) = ((uint16_t)intFlags & I2C_STR_INTMASK);

    //
    // Clear the FIFO interrupt flags if needed.
    //
    if ((intFlags & I2C_INT_TXFF) != 0U)
    {
        HWREGH(base + I2C_O_FFTX) |= I2C_FFTX_TXFFINTCLR;
    }

    if ((intFlags & I2C_INT_RXFF) != 0U)
    {
        HWREGH(base + I2C_O_FFRX) |= I2C_FFRX_RXFFINTCLR;
    }
}
//*****************************************************************************
//
// I2C_configureModuleFrequency
//
//*****************************************************************************
void I2C_configureModuleFrequency(uint32_t base, uint32_t sysclkHz)
{
    uint32_t modPrescale;

    //
    // Check the arguments.
    //
    ASSERT(I2C_isBaseValid(base));

    //
    // Set the prescaler for the module clock.
    //
    modPrescale              = (sysclkHz / 10000000U) - 1U;
    HWREGH(base + I2C_O_PSC) = I2C_PSC_IPSC_M & modPrescale;
}
//*****************************************************************************
//
// I2C_configureModuleClockFrequency
//
//*****************************************************************************
void I2C_configureModuleClockFrequency(uint32_t base, uint32_t sysclkHz, uint32_t moduleFrequency)
{
    uint32_t modPrescale;

    //
    // Check the arguments.
    //
    ASSERT(I2C_isBaseValid(base));

    //
    // Set the prescaler for the module clock.
    //
    modPrescale              = (sysclkHz / moduleFrequency) - 1U;
    HWREGH(base + I2C_O_PSC) = I2C_PSC_IPSC_M & modPrescale;
}
